1. Field of the Invention
The present invention generally relates to design tools for digital designs. More specifically, the invention relates to apparatus and methods that provide component interconnection information of digital designs for programmable chip systems.
2. Description of Related Art
A digital design for a programmable chip system typically includes a master component coupled to multiple slave components. A master component such as a processor typically sends requests to slave components such as timers and parallel input/output (PIO) interfaces for data. Master components are coupled to slave components via corresponding ports. In creating the digital design, a designer can specify which components are connected. In one example, a timer may only be accessible to one of two processors in a system.
Conventional mechanisms for providing interconnection information are limited. More specifically, when the quantity of data is large and the data is interrelated (e.g., masters, slaves, master-slave connections, etc.), the information displayed can be unwieldy to a user, especially if the user is interested in only a subset of the data. Consequently, it is beneficial to present improved mechanisms for providing interconnection information for programmable chip systems.